aiSee: Pipeline Analysis<>index

Pipeline analysis

Visualization of pipeline analysis results as produced by aiT for MPC5xx. Each yellow or green subgraph corresponds to a single pipeline state. Each horizontal layer corresponds to one CPU cycle. Vertical branches represent different execution scenarios. aiSee's subgraph nesting operations provide for interactive inspection of CPU and CPU core states on arbitrary points.

Pipeline states Pipeline + CPU states Pipeline + CPU + Core states

Only a small part of the actual graph is shown here (the grey subgraph illustrates the pipeline behavior of a single instruction). The entire graph contains 5295 nodes, 5471 edges and 1160 nested subgraphs. aiSee needs less than 10 seconds to render the entire graph (1GHz PC).

Graph legend

1: Start state*, 2: Intermediate state*, 3: End state*, 4: State description,
5: Flash A, 6: Flash B, 7: Memory controller, 8: L2U,
9: Fetch, 10: Dispatch, 11: Execute, 12: Write-back,
13: Decode buffer, 14: Prefetch queue, 15: History queue.

* Relative to the instruction represented by the grey subgraph.

» February 2004: NFL postseason / Super Bowl XXXVIII
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Last modified on 1 January 2004 by webmaster. © 2004 AbsInt.
URL: http://www.aisee.com/graph_of_the_month/mpc.htm


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